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- Path: informatik.tu-muenchen.de!fischerj
- From: fischerj@informatik.tu-muenchen.de (Juergen "Rally" Fischer)
- Newsgroups: comp.sys.amiga.programmer
- Subject: Re: doubling pixels horizontally
- Date: 5 Mar 1996 14:45:50 GMT
- Organization: Technische Universitaet Muenchen, Germany
- Distribution: world
- Message-ID: <4hhk2u$5rt@sunsystem5.informatik.tu-muenchen.de>
- References: <4f4ibc$gl9@news.cs.tu-berlin.de> <591.6610T1165T2102@login.eunet.no><1045.6611T753T2256@vip.cybercity.dk><4faoe1$47@sunsystem5.informatik.tu-muenchen.de><2991.6612T1034T625@vip.cybercity.dk><576.6613T1070T1730@login.eunet.no><1257.6614T57T922 <4gkknd$b1v@brachio.zrz.TU-Berlin.DE> <4h4iv1$n3s@sunsystem5.informatik.tu-muenchen.de> <4herkg$13h@brachio.zrz.TU-Berlin.DE>
- NNTP-Posting-Host: hphalle6g.informatik.tu-muenchen.de
- Originator: fischerj@hphalle6g.informatik.tu-muenchen.de
-
-
- In article <4herkg$13h@brachio.zrz.TU-Berlin.DE>, rawneiha@w350zrz.zrz.TU-Berlin.DE (Philipp Boerker) writes:
- |> Organization: Technical University Berlin, Germany
- |> Lines: 28
- |> Message-ID: <4herkg$13h@brachio.zrz.TU-Berlin.DE>
- |> References: <4f4ibc$gl9@news.cs.tu-berlin.de> <591.6610T1165T2102@login.eunet.no><1045.6611T753T2256@vip.cybercity.dk><4faoe1$47@sunsystem5.informatik.tu-muenchen.de><2991.6612T1034T625@vip.cybercity.dk><576.6613T1070T1730@login.eunet.no><1257.6614T57T922|>
- |> <4gkknd$b1v@brachio.zrz.TU-Berlin.DE> <4h4iv1$n3s@sunsystem5.informatik.tu-muenchen.de>
- |> NNTP-Posting-Host: w350zrz.zrz.tu-berlin.de
- |>
- |> fischerj@informatik.tu-muenchen.de (Juergen "Rally" Fischer) writes:
- |>
- |>
- |> >|> >Your are not using the CPU and the BLITTER at the same time in chipram are
- |> >|> >you??? Because that is very foolish! :) (read: SLOW!)
- |> >|>
- |> >|> No, I don't. I even toggle blitternasty-bit at the importent places...
- |>
- |> >not good. blitter parallel (default) is as fast as nasty as long as
- |> >cpu doesn't acess chipmem.
- |>
- |> I distrusted Commo, toggling bnasty shouldn't do any harm at least...
- |>
- |> >blitternasty was mostly good in A500 times (cpu always acesses chipmem! ever
- |> >tried a halt instruction ?
- |>
- |> What? Can you explain that?
-
- afaik the halt instruction stops cpu until any interrupt is caused.
- would keep 68000 from reading instructions from chipmem.
-
- |>
- |> >should make bus free waiting for blitter...)
- |>
- |> >and blitternasty is mostly bad in AGA times (even on vanilla A1200, due to cache).
- |>
- |> What cache? CHIP isn't cached...
-
- chip is instruction cached, at least on 020. Instruction stream is what
- brakes blitter (if not nasty) on 68000 even when doing "no" memory acess.
-
- If the cpu does no chipmem acess, blitter is as fast in no-nasty mode,
- but the advantage is if you do some chipacess by cpu it won't be breaked
- (on A500 cpu was locked in that case (4planes lores), don't know if
- under fmode=3 also a full cpu lock will occur if nasty is on).
-
- conclusion: always use blitter non-nasty on AGA (which is set by
- OS, so final conclusion: don't change nasty bit :))
-
- |>
- |> Greets,
- |> Phil.
- |> grond/matrix
- |>
- ------------------------------------------------------------------------
- fischerj@Informatik.TU-Muenchen.DE (Juergen "Rally" Fischer) =:)
-
-